How do FPGA Modules Drive Real-Time Applications? – 8400530
FPGA Modules with an Integrated Processor Drive Real-Time Applications
Engineers developing DSP and high speed logic applications are now well-aware that FPGA modules can help them create an integrated, sophisticated solution. The availability of commercial off-the-shelf (COTS) FPGA boards can make these solutions viable and do so in reduced development times. Today, with systems architected to perform extremely time-critical tasks on a COTS FPGA module, the host CPU is often relegated to managing the flow of processed data to and from the FPGA module across a PCI-X bus, PCIe, Serial RapidIO, or other data interface. This data transfer is usually necessary because some processing or data storage activities are shared between the FPGA module and host CPU. Must these activities be shared? Could more processing and management of the data be performed in one place? If the application has high-speed requirements and more of the slower data management or calculation tasks can be lifted from the host CPU, then a COTS FPGA module with an integrated processor might be the solution.
FPGAs, by design, are massively parallel processing devices. Processes such as image processing, where a large amount of data has to be manipulated and filtered simultaneously, can take advantage of this parallel processing capability. The language developed to process this information, VHDL, is well-suited to create the parallel processes necessary. On the other hand, CPUs are designed to process complex, but sequential, configurable data manipulations. Mixed resolution matrix processes used to rotate an image are one example best handled by a CPU. Coding for the CPU process is usually written in one of the popular high level languages (HLL) such as C++. When both the FPGA and the processor appeared to have a natural fit within the application, the norm was to marry the two devices in an attempt to optimize the application’s data processing. The problem that arose from this approach was the constant and time-consuming task of passing sizable chunks of data between the FPGA and processor. This problem can be minimized, or even eliminated, if the two components can be united in a single, integrated design
So, how does a design engineer gain access to the computational and data management conveniences afforded by a processor within an FPGA?
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