XMC-6260-CC: 10-Gigabit Ethernet Interface Module with Dual XAUI Ports

Acromag’s XMC-6260 provides a 10-gigabit Ethernet (10GbE) interface solution for data-intensive real-time embedded computing systems. Ultra-high performance is achieved using a hardware-based TCP/IP offload engine (TOE processor).

Typical applications include high-speed data storage, image collection/transfer, distributed control networks, and board-to-board interfaces.

Fully Integrated Network Interface Card.

With the adoption of 10GbE interfaces and rapidly increasing volumes of data, even the most powerful embedded processors can no longer manage data flow without a significant reduction in performance. To solve this problem, Acromag’s XMC-6260-CC pairs a high-performance Chelsio T4 purpose-built multi-protocol processor with two channels of 10GbE connectivity. This combination maintains maximum 10GbE performance to meet the needs of data-intensive real-time applications.

High Performance Protocol Offload Engine
A PCI Express v2.0 ×8 host interface provides a high-speed connection to the system processor. With support for 5Gbps data rates, the PCIe interface delivers up to 32Gbps of bandwidth to the server. This connection accommodates stateless offloads, packet filtering (firewall offload), and traffic shaping (media streaming).

This module is optimized for cloud computing, HPC, Virtualization, storage and other data center applications.

Complete and Flexible TCP Offload
The XMC-6260-CC’s TOE ASIC has hundreds of programmable registers for protocol configuration and offload control. As a result, the XMC-6260-CC can offload TCP processing per connection, per server, per interface. It can also globally and simultaneously tunnel traffic from non-offloaded connections to the host processor for the native TCP/IP stack to process. Additionally, the XMC-6260-CC provides a flexible zero-copy capability for regular TCP connections, requiring no changes to the sender, to deliver line rate performance with minimal CPU usage.

Packet Switching and Routing
The XMC-6260-CC integrates a high-performance packet switch, which allows switching of traffic from any of the input ports to any of the output ports (wire-to-wire), and from any of the output ports to any of the input ports (host-to-host).

Compatibility
Acromag’s XMC-6260-CC provides guaranteed interoperability and compatibility with the full Ethernet standard.

Extensive Software Support
The XMC-6260-CC offers a full suite of protocol software and drivers. Linux software tools support all offload (TOE) and network interface (NIC) operations. Windows software supports NIC operations.

Performance Specifications

Communication

Ethernet interface: Dual XAUI ports.
Throughput: 2500Mbytes per second, per port, full-duplex.
Latency: 2µs end-to-end.
PCI Express: PCIe 8-lane (x8) Gen 2.0 interface.
Determinism: ±1µs.

XMC Compliance

Complies with ANSI/VITA 42.0 specification for XMC module mechanicals and connectors.
Complies with ANSI/VITA 42.3 specification for XMC modules with PCI Express interface.
Complies with ANSI/VITA 42.6 specification for XMC modules with XAUI interface.
Electrical/Mechanical Interface: Single-Width Module.

TCP/IP Offload Engine (TOE)

TOE processor: The ASIC incorporates two XGMAC (10GbE) interfaces. These interfaces are labeled MAC0 and MAC1. The ports support 10GBASE-KX4 and XAUI standards. They contain four lanes (four differential TX pairs and four differential RX pairs) of high speed SERDES. KX4 and XAUI operations will use all four lanes of MAC0 and MAC1. For MAC0 and MAC1, all 10GbE serial communication takes place on Lane 0 only.

Software Support

Linux operating systems: Drivers available with support for all TOE and NIC functions. Please contact factory for details.
Windows operating systems: Drivers available with support for NIC functions. Please contact factory for details.

Electrical

XMC PCIe bus interface (P15 and P16): One 114-pin male connector (Samtec ASP-103614-05 or equivalent).
P15 primary XMC connector: 8 differential TX pairs (PCIe) and 8 differential RX pairs (PCIe).
Optional JTAG: 6 JTAG signals: (TDI, TDO, TMS, TCK, 3.3V, and ground). JTAG interface follows IEEE Standard 1149.1, which defines a test access port (TAP) and boundary-scan architecture.
System Management: (XMC provides hardware definition information read by an external controller using IPMI commands and I2C serial bus transactions.)
3.3V power: 4 pins at 1A/pin.
3.3V auxiliary power: 1 pin for system management.
Variable power (5V or 12V): 8 pins at 1A per pin.
P16 XMC connector: 2 ports each with 4 differential TX pairs and 4 differential RX pairs (XAUI/KX4 operations). 1 global clock differential pair.

Environmental

Operating temperature: -40 to 85°C.
Storage temperature: -55 to 125°C.
Relative humidity: 5 to 95% non-condensing.
Power requirements:  3.3V (±5%): Consult factory. 5V (±5%): Consult factory. 12V (±5%): Consult factory.
MTBF: Contact the factory.

Additional information