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Product short description:
  • Two AcroPack or mini-PCIe mezzanine module slots
  • Non-Intelligent carrier card
  • PCIe x4 interface

This board interfaces two AcroPack mezzanine modules to a PCI Express bus on an air-cooled XMC carrier. Two AcroPack module slots give you the freedom to mix a variety of I/O functions (A/D, D/A, digital in, digital out, serial I/O, etc.) on a single board.

 

XMCAP2000: XMC Carrier Card for AcroPack® Modules Description

This board interfaces two AcroPack mezzanine modules to a PCI Express bus on an air-cooled XMC carrier.

Two AcroPack module slots give you the freedom to mix a variety of I/O functions (A/D, D/A, digital in, digital out, serial I/O, etc.) on a single board. Or, combine modules of the same type for almost one hundred channels on a single card. Either way, the XMCAP2020/2021 saves your precious card slots and reduces your costs.

Select I/O modules from Acromag’s offering or use most third-party mPCIe compliant modules.

Designed for COTS applications these XMC carrier boards deliver high-reliability and high-performance at a low cost.

AcroPack carriers are RoHS compliant and ideal for military, defense, automation, aerospace, scientific, and development labs industries.

Specifications

PCI Express Bus Compliance

This device meets or exceeds all written PCI Express specifications per revision 2.1.
Includes a PCIe Gen 2 switch to expand the single host
PCIe port to two ports, one to each device (AcroPack or mini-PCIe).
The host port consists of four PCIe lanes, each of the miniPCIe sites have one lane each.

Field I/O Connectors

Front I/O
XMCAP2020-LF: Two 68-pin 0.8mm Champ cable connection. Pin assignments are defined by the installed AcroPack or mini-PCIe module.

Rear I/O
XMCAP2021-LF: One AcroPack routed to rear P14 connector and one AcroPack routed to rear P16 connection.

XMCAP2022-LF: One AcroPack routed to P16 and the second to P14. Intended for ARCX-4000 applications only

Ease of Use

A unique carrier and site number can be set for each AcroPack site by a DIP switch or geographical addressing. This provides the capability to distinguish a particular AcroPack module from others when multiple instances of the same module are used in a system.

JTAG signal are provided for programming and debugging the FPGA on some AcroPack modules. The JTAG ports of the two AcroPack modules are daisy-chained.

Physical

Physical Configuration
PCIe x4 lane
Length: 5.866 inches (149 mm)
Height: 2.9134 inches (74 mm)
Conforms to VITA 42 air-cooled XMC specification.

Environmental

Operating temperature: -40 to +70°C
Storage temperature: -55 to +125°C.
Relative humidity: 5 to 95% non-condensing.
Power
+3.3 Volts (±5%): 140mA typical
VPWR: +5 Volts (± 5%): 200mA typical
VPWR: +12 Volts (± 8%): <100 mA typical

The XMCAP2020/2021 has four DC/DC converters to provide the power supply voltages to the AcroPack modules that are not present at the host interface. The +1.5 Volt supply is sourced from the VPWR host power. The +5 Volt and ±12 Volt supplies are sourced from +3.3 Volt host power.

 

  • Two AcroPack or mini-PCIe module slots support any combination of I/O functions
  • PCI Express compliant
  • Plug-and-play carrier configuration and interrupt support
  • Front panel 68-pin CHAMP 0.8mm connectors for field I/O
  • Rear P14 and P16 connectors for field I/O
  • DIP switch and/or geographical addressing for card identification
  • VITA 42.0, 42.3 complaint
  • JTAG programming through XMC P15 connector or through onboard micro connector
  • Software development tools for VxWorks, Linux, and Windows environments

 

What is FPGA Zynq UltraScale+ with MPSoC? - 8401065 (Log in to view the file)
APZU FPGA-based digital I/O modules provide programmable Xilinx® Zynq UltraScale+ MPSoC This paper is a brief overview of some of Acromag’s APZU FPGA Zynq® UltraScale+™ with MPSoC products, as well as the features of AcroPack Zinq UltraScale+, the carrier boards that host AcroPack mezzanine modules. We’ll highlight some of the development tools, the engineering design kit, and...
What are FPGAs and FPGA Applications? | Webcast
FPGAs and Their Use in the Embedded Space What are FPGAs and FPGA Applications in the Embedded Space? Topics in this webcast include: What FPGAs Are Best-suited Applications Coding Methods Processing Types This video is part one of a three-part series in collaboration with Vic Myers Associates discussing the use of FPGAs and their applications.  ...
How to Use Vivado for FPGA Modifications | Webcast
FPGA Design Modifications Using Vivado & Acromag Tools How to Use Vivado for FPGA Modifications. Topics in this webcast include: Vivado 2019.2 Acromag Example Design Compile Project Produce new MCS file This video is part two of a three-part series in collaboration with Vic Myers Associates discussing the use of FPGAs and their applications.  ...
What is FPGA Zync UltraScale+? | Webcast
These FPGA modules provide a programmable Xilinx Zynq® UltraScale+™ MPSoC What is FPGA Zync UltraScale+? Acromag’s APZU series modules provide a programmable Xilinx Zynq® UltraScale+™ multiprocessor system on a chip (MPSoC). This MPSoC combines a feature-rich ARM-based processing system and programmable logic in a single device. The AcroPack® APZU Mini PCIe FPGA Series is the...
How do FPGA Modules Drive Real-Time Applications? - 8400530
FPGA Modules with an Integrated Processor Drive Real-Time Applications Engineers developing DSP and high speed logic applications are now well-aware that FPGA modules can help them create an integrated, sophisticated solution. The availability of commercial off-the-shelf (COTS) FPGA boards can make these solutions viable and do so in reduced development times. Today, with systems architected...
Migrating from VME to VPX or PCIe: Top 6 Considerations | Webcast
In this webcast several important topics are covered for migrating from VME to VPX or PCIe. This includes the advantages and disadvantages of VME architecture, six key considerations, and an overview of migration to PCIe or VPX (advantages, disadvantages, complexity, performance and cost).   More Resources: What is FPGA Zynq UltraScale+ with MPSoC? | Technology...

Manuals

XMCAP2020 / XMCAP2021 User Manual (Log in to download the file)

XMCAP2022 User Manual (Log in to download the file)

Drawings & Diagrams

  • Compare

    Embedded Cables

    • Communication Signal Cables
    • Wide assortment of ribbon cables
    Select options
  • Compare

    AP-CC-01: Conduction-Cool Kit

    • Required for conduction-cooled applications using an AcroPack
    Select options
  • Compare

    Termination Products

    • DIN rail-mount panels
    • 50 screw terminals on 50-pin connector termination panels
    • 50 screw terminals on SCSI-2 connector termination panels
    • 68 screw terminals on SCSI-3 connector termination panels
    Select options

Additional information

Weight N/A
Dimensions N/A
Part Number

XMCAP2020-LF: front I/O only, XMCAP2021-LF: rear I/O only, XMCAP2022-LF: rear I/O only, for ARCX-4000 applications (consult factory).

Product Series

AcroPack Series

  • Description

    XMCAP2000: XMC Carrier Card for AcroPack® Modules Description

    This board interfaces two AcroPack mezzanine modules to a PCI Express bus on an air-cooled XMC carrier.

    Two AcroPack module slots give you the freedom to mix a variety of I/O functions (A/D, D/A, digital in, digital out, serial I/O, etc.) on a single board. Or, combine modules of the same type for almost one hundred channels on a single card. Either way, the XMCAP2020/2021 saves your precious card slots and reduces your costs.

    Select I/O modules from Acromag’s offering or use most third-party mPCIe compliant modules.

    Designed for COTS applications these XMC carrier boards deliver high-reliability and high-performance at a low cost.

    AcroPack carriers are RoHS compliant and ideal for military, defense, automation, aerospace, scientific, and development labs industries.

    Specifications

    PCI Express Bus Compliance

    This device meets or exceeds all written PCI Express specifications per revision 2.1.
    Includes a PCIe Gen 2 switch to expand the single host
    PCIe port to two ports, one to each device (AcroPack or mini-PCIe).
    The host port consists of four PCIe lanes, each of the miniPCIe sites have one lane each.

    Field I/O Connectors

    Front I/O
    XMCAP2020-LF: Two 68-pin 0.8mm Champ cable connection. Pin assignments are defined by the installed AcroPack or mini-PCIe module.

    Rear I/O
    XMCAP2021-LF: One AcroPack routed to rear P14 connector and one AcroPack routed to rear P16 connection.

    XMCAP2022-LF: One AcroPack routed to P16 and the second to P14. Intended for ARCX-4000 applications only

    Ease of Use

    A unique carrier and site number can be set for each AcroPack site by a DIP switch or geographical addressing. This provides the capability to distinguish a particular AcroPack module from others when multiple instances of the same module are used in a system.

    JTAG signal are provided for programming and debugging the FPGA on some AcroPack modules. The JTAG ports of the two AcroPack modules are daisy-chained.

    Physical

    Physical Configuration
    PCIe x4 lane
    Length: 5.866 inches (149 mm)
    Height: 2.9134 inches (74 mm)
    Conforms to VITA 42 air-cooled XMC specification.

    Environmental

    Operating temperature: -40 to +70°C
    Storage temperature: -55 to +125°C.
    Relative humidity: 5 to 95% non-condensing.
    Power
    +3.3 Volts (±5%): 140mA typical
    VPWR: +5 Volts (± 5%): 200mA typical
    VPWR: +12 Volts (± 8%): <100 mA typical

    The XMCAP2020/2021 has four DC/DC converters to provide the power supply voltages to the AcroPack modules that are not present at the host interface. The +1.5 Volt supply is sourced from the VPWR host power. The +5 Volt and ±12 Volt supplies are sourced from +3.3 Volt host power.

     

  • Features & Benefits

    • Two AcroPack or mini-PCIe module slots support any combination of I/O functions
    • PCI Express compliant
    • Plug-and-play carrier configuration and interrupt support
    • Front panel 68-pin CHAMP 0.8mm connectors for field I/O
    • Rear P14 and P16 connectors for field I/O
    • DIP switch and/or geographical addressing for card identification
    • VITA 42.0, 42.3 complaint
    • JTAG programming through XMC P15 connector or through onboard micro connector
    • Software development tools for VxWorks, Linux, and Windows environments

     

  • Tech Papers

    What is FPGA Zynq UltraScale+ with MPSoC? - 8401065 (Log in to view the file)
    APZU FPGA-based digital I/O modules provide programmable Xilinx® Zynq UltraScale+ MPSoC This paper is a brief overview of some of Acromag’s APZU FPGA Zynq® UltraScale+™ with MPSoC products, as well as the features of AcroPack Zinq UltraScale+, the carrier boards that host AcroPack mezzanine modules. We’ll highlight some of the development tools, the engineering design kit, and...
    What are FPGAs and FPGA Applications? | Webcast
    FPGAs and Their Use in the Embedded Space What are FPGAs and FPGA Applications in the Embedded Space? Topics in this webcast include: What FPGAs Are Best-suited Applications Coding Methods Processing Types This video is part one of a three-part series in collaboration with Vic Myers Associates discussing the use of FPGAs and their applications.  ...
    How to Use Vivado for FPGA Modifications | Webcast
    FPGA Design Modifications Using Vivado & Acromag Tools How to Use Vivado for FPGA Modifications. Topics in this webcast include: Vivado 2019.2 Acromag Example Design Compile Project Produce new MCS file This video is part two of a three-part series in collaboration with Vic Myers Associates discussing the use of FPGAs and their applications.  ...
    What is FPGA Zync UltraScale+? | Webcast
    These FPGA modules provide a programmable Xilinx Zynq® UltraScale+™ MPSoC What is FPGA Zync UltraScale+? Acromag’s APZU series modules provide a programmable Xilinx Zynq® UltraScale+™ multiprocessor system on a chip (MPSoC). This MPSoC combines a feature-rich ARM-based processing system and programmable logic in a single device. The AcroPack® APZU Mini PCIe FPGA Series is the...
    How do FPGA Modules Drive Real-Time Applications? - 8400530
    FPGA Modules with an Integrated Processor Drive Real-Time Applications Engineers developing DSP and high speed logic applications are now well-aware that FPGA modules can help them create an integrated, sophisticated solution. The availability of commercial off-the-shelf (COTS) FPGA boards can make these solutions viable and do so in reduced development times. Today, with systems architected...
    Migrating from VME to VPX or PCIe: Top 6 Considerations | Webcast
    In this webcast several important topics are covered for migrating from VME to VPX or PCIe. This includes the advantages and disadvantages of VME architecture, six key considerations, and an overview of migration to PCIe or VPX (advantages, disadvantages, complexity, performance and cost).   More Resources: What is FPGA Zynq UltraScale+ with MPSoC? | Technology...
  • Specs & Data Sheets

    Manuals

    XMCAP2020 / XMCAP2021 User Manual (Log in to download the file)

    XMCAP2022 User Manual (Log in to download the file)

    Drawings & Diagrams

  • Accessories

    • Compare

      Embedded Cables

      • Communication Signal Cables
      • Wide assortment of ribbon cables
      Select options
    • Compare

      AP-CC-01: Conduction-Cool Kit

      • Required for conduction-cooled applications using an AcroPack
      Select options
    • Compare

      Termination Products

      • DIN rail-mount panels
      • 50 screw terminals on 50-pin connector termination panels
      • 50 screw terminals on SCSI-2 connector termination panels
      • 68 screw terminals on SCSI-3 connector termination panels
      Select options
  • Additional information

    Additional information

    Weight N/A
    Dimensions N/A
    Part Number

    XMCAP2020-LF: front I/O only, XMCAP2021-LF: rear I/O only, XMCAP2022-LF: rear I/O only, for ARCX-4000 applications (consult factory).

    Product Series

    AcroPack Series