VPX4500: VPX Carrier Cards for AcroPack® Modules

The VPX4500 is a 3U VPX carrier for Acromag AcroPack mezzanine board modules. The carrier board provides a modular approach to system assembly since each carrier can be populated with any combination of analog input/output, digital input/output, communication, AP modules. The modularity allows the user to create a board which is customized to the application. This saves money and space; a single carrier board populated with AP modules may replace several dedicated function VPX boards. The VPX4500 carrier board provides impressive functionality at low cost.

Model VPX4500E-LF is an air-cooled product that supports three AcroPack sites. Two of the sites provide field I/O connections through front panel mounted 50 pin shielded connectors. The third site provides field I/O connections through the VPX backplane.

Model VPX4500-CC-LF is a conduction-cooled product that supports three AcroPack sites. Two of the sites provide field I/O connections through 50 pin ribbon cable connectors. The third site provides field I/O connections to the VPX backplane. Model VPX4500-RTM-LF is a rear transition module used with both the VPX4500-E-LF and the VPX4500-CC-LF carriers to provide access to the slot C AcroPack field I/O signals.

The AcroPack® product line updates our popular Industry Pack I/O modules with a PCIe interface format. This tech-refresh design offers a compact size, low-cost I/O, the same functionality and memory map of the existing Industry Pack
modules.

Select I/O modules from Acromag’s offering or use some third-party mPCIe compliant modules.

Performance Specifications

PCI Express Bus Compliance

This device meets or exceeds all written PCI Express specifications per revision 2.1.

Includes a PCIe Gen 2 switch to expand the single host PCIe port to three ports, one to each device (AcroPack or mini-PCIe).

The host port consists of four PCIe lanes, each of the mini-PCIe sites have one lane each.

Ease of Use

A unique carrier and site number is set via slot address. This provides the capability to distinguish a particular AcroPack module from others when multiple instances of the same module are used in a system.

A standard 14-pin Xilinx JTAG programming header is provided for programming and debugging the FPGA on some AcroPack modules. The JTAG ports of the two AcroPack modules are daisy-chained.

General

Form Factor: 3U VPX bus 6.299” (160mm) x 3.937” (100.0mm).

Pitch: VPX4500-LF (air-cooled): 1” pitch. VPX4500-CC-LF (conduction-cooled): 1” pitch.

VPX Carrier Interface: Compatible VITA 65 module / slot profiles – FRU EEPROM with temperature monitor.

AcroPack Interface: One AcroPack module in single VPX slot.

3.3V, 5V and ±12V provided for AcroPack modules via the VPX backplane.

Power Requirements

Power
+3.3 Volts (±10%): 0.55mA typical.
+12 Volts (±5%): 25mA Typical.

The VPX4500 has two DC/DC converters to provide the power supply voltages to the AcroPack modules that are not present at the host interface. The +1.5 Volt supply is sourced from the 5 Volt host power. The -12 Volt supply is sourced from +12 Volt host power.

Physical

Physical Configuration: PCIe x4 lane.

Field I/O Connector
VPX4500-CC-LF: Two 50-pin male headers.
VPX4500-LF: Two 50-pin Champ 0.8mm connectors.

Environmental

Operating temperature
VPX4500-LF: -40 to +85°C.
VPX4500-CC-LF: -40 to +85°C.
VPX4500-RTM-LF: -40 to +85°C.

Storage Temperature Range: -55 to 125°C.

Relative Humidity: 5 to 95% non-condensing.

Vibration: 0.05g RMS (20 – 2000Hz) random, operating 6g RMS per Hz spectrum.

Shock: 30g each axis, 11ms.