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Product short description:
  • Two AcroPack or mini-PCIe mezzanine module slots
  • Non-Intelligent carrier card
  • PCIe x4 interface

This board interfaces two AcroPack mezzanine modules to a PCI Express bus on a PC-based computer system.

This board interfaces two AcroPack mezzanine modules to a PCI Express bus on a PC-based computer system.

Two AcroPack module slots give you the freedom to mix a variety of I/O functions (A/D, D/A, digital in, digital out, serial I/O, etc.) on a single board. Or, combine modules of the same type for almost one hundred channels on a single card. Either way, the APCe7020 saves your precious card slots and reduces your costs.

The AcroPack® product line updates our popular Industry Pack I/O modules with a PCIe interface format. This tech-refresh design offers a compact size, low-cost I/O, the same functionality and memory map of the existing Industry Pack modules.

Performance Specifications

PCI Express Bus Compliance

This device meets or exceeds all written PCI Express specifications per revision 2.1.

Includes a PCIe Gen 2 switch to expand the single host PCIe port to two ports, one to each device (AcroPack or mini-PCIe).

The host port consists of four PCIe lanes, each of the mini-PCIe sites have one lane each.

I/O Interface

Connector

P1 (PCIe Bus): PCIe V2.1 x4 lane (PCIe Gen 2 Switch).
J3 (Carrier Field I/O): 68-pin, stacked, CHAMP (TE Connectivity 5787962).
P2, 3 (AcroPack Field I/O): 100-pin socket (Samtec SS5-50-3.00-L-D-K-RT).
J1, 2 (Mini-PCIe): 52-pin socket (TE Connectivity 1759547-1).
P6 (JTAG): 14-pin header (Molex 87832-1420).

Gold plating in the connection area, M2.5 screws and spacers provide excellent connection integrity and stability for harsh environments.

Ease of Use

A unique carrier and site number can be set for each AcroPack site by a DIP switch. This provides the capability to distinguish a particular AcroPack module from others when multiple instances of the same module are used in a system.

A standard 14-pin Xilinx JTAG programming header is provided for programming and debugging the FPGA on some AcroPack modules. The JTAG ports of the two AcroPack modules are daisy-chained.

Physical

Physical Configuration: PCIe x4 lane. Length: 6.3 inches (160.02 mm). Height: 4.375 inches (111.12 mm).

Environmental

Operating temperature: -40 to 85°C with 200 LFM airflow.
Storage temperature: -55 to 125°C.
Relative humidity: 5 to 95% non-condensing.
Power
3.3 Volts (±5%): 0.5 A typical.
12 Volts (±8%): 27mA typical.

The APCe7020E-LF has three DC/DC converters to provide the power supply voltages to the AcroPack modules that are not present at the host interface. The 1.5 Volt supply is sourced from the 3.3 Volt host power. The 5 Volt and -12 Volt supply is sourced from 12 Volt host power.

  • Two AcroPack or mini-PCIe module slots support any combination of I/O functions
  • PCI Express compliant
  • Plug-and-play carrier configuration and interrupt support
  • Fused 1.5V, 3.3V, 5V, 12V, and -12V DC power is provided. A fuse is present on each supply line serving each AcroPack module.
  • Front panel 68-pin VHDC1 CHAMP 0.8 connectors for field I/O signals
  • Extended temperature range
  • DIP switch card identification
  • Standard 14-pin Xilinx JTAG programming header
  • Software development tools for VxWorks, Linux, and Windows environments
What is FPGA Zynq UltraScale+?
APZU FPGA-based digital I/O modules provide programmable Xilinx® Zynq UltraScale+ MPSoC This paper is a brief overview of some of Acromag’s APZU FPGA Zynq® UltraScale+™ with MPSoC products, as well as the features of AcroPack Zinq UltraScale+, the carrier boards that host AcroPack mezzanine modules. We’ll highlight some of the development tools, the engineering design kit, and...
What are FPGAs and FPGA Applications? | Webcast
FPGAs and Their Use in the Embedded Space What are FPGAs and FPGA Applications in the Embedded Space? Topics in this webcast include: What FPGAs Are Best-suited Applications Coding Methods Processing Types This video is part one of a three-part series in collaboration with Vic Myers Associates discussing the use of FPGAs and their applications.  ...
How to Use Vivado for FPGA Modifications | Webcast
FPGA Design Modifications Using Vivado & Acromag Tools How to Use Vivado for FPGA Modifications. Topics in this webcast include: Vivado 2019.2 Acromag Example Design Compile Project Produce new MCS file This video is part two of a three-part series in collaboration with Vic Myers Associates discussing the use of FPGAs and their applications.  ...
What is FPGA Zync UltraScale+? | Webcast
These FPGA modules provide a programmable Xilinx Zynq® UltraScale+™ MPSoC What is FPGA Zync UltraScale+? Acromag’s APZU series modules provide a programmable Xilinx Zynq® UltraScale+™ multiprocessor system on a chip (MPSoC). This MPSoC combines a feature-rich ARM-based processing system and programmable logic in a single device. The AcroPack® APZU Mini PCIe FPGA Series is the...
How do FPGA Modules Drive Real-Time Applications?
FPGA Modules with an Integrated Processor Drive Real-Time Applications Engineers developing DSP and high speed logic applications are now well-aware that FPGA modules can help them create an integrated, sophisticated solution. The availability of commercial off-the-shelf (COTS) FPGA boards can make these solutions viable and do so in reduced development times. Today, with systems architected...
Migrating from VME to VPX or PCIe: Top 6 Considerations | Webcast
In this webcast several important topics are covered for migrating from VME to VPX or PCIe. This includes the advantages and disadvantages of VME architecture, six key considerations, and an overview of migration to PCIe or VPX (advantages, disadvantages, complexity, performance and cost).   More Resources: What is FPGA Zynq UltraScale+ with MPSoC? | Technology...
APSW-API-LNX (Log in to download the file)
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    • Programming interface with function routines for AcroPack modules/carriers.
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Additional information

Weight N/A
Dimensions N/A
Part Number

APCe7022E-LF: holds 2 AcroPack boards, extended temperature range

Product Series

AcroPack Series

  • Description

    This board interfaces two AcroPack mezzanine modules to a PCI Express bus on a PC-based computer system.

    Two AcroPack module slots give you the freedom to mix a variety of I/O functions (A/D, D/A, digital in, digital out, serial I/O, etc.) on a single board. Or, combine modules of the same type for almost one hundred channels on a single card. Either way, the APCe7020 saves your precious card slots and reduces your costs.

    The AcroPack® product line updates our popular Industry Pack I/O modules with a PCIe interface format. This tech-refresh design offers a compact size, low-cost I/O, the same functionality and memory map of the existing Industry Pack modules.

    Performance Specifications

    PCI Express Bus Compliance

    This device meets or exceeds all written PCI Express specifications per revision 2.1.

    Includes a PCIe Gen 2 switch to expand the single host PCIe port to two ports, one to each device (AcroPack or mini-PCIe).

    The host port consists of four PCIe lanes, each of the mini-PCIe sites have one lane each.

    I/O Interface

    Connector

    P1 (PCIe Bus): PCIe V2.1 x4 lane (PCIe Gen 2 Switch).
    J3 (Carrier Field I/O): 68-pin, stacked, CHAMP (TE Connectivity 5787962).
    P2, 3 (AcroPack Field I/O): 100-pin socket (Samtec SS5-50-3.00-L-D-K-RT).
    J1, 2 (Mini-PCIe): 52-pin socket (TE Connectivity 1759547-1).
    P6 (JTAG): 14-pin header (Molex 87832-1420).

    Gold plating in the connection area, M2.5 screws and spacers provide excellent connection integrity and stability for harsh environments.

    Ease of Use

    A unique carrier and site number can be set for each AcroPack site by a DIP switch. This provides the capability to distinguish a particular AcroPack module from others when multiple instances of the same module are used in a system.

    A standard 14-pin Xilinx JTAG programming header is provided for programming and debugging the FPGA on some AcroPack modules. The JTAG ports of the two AcroPack modules are daisy-chained.

    Physical

    Physical Configuration: PCIe x4 lane. Length: 6.3 inches (160.02 mm). Height: 4.375 inches (111.12 mm).

    Environmental

    Operating temperature: -40 to 85°C with 200 LFM airflow.
    Storage temperature: -55 to 125°C.
    Relative humidity: 5 to 95% non-condensing.
    Power
    3.3 Volts (±5%): 0.5 A typical.
    12 Volts (±8%): 27mA typical.

    The APCe7020E-LF has three DC/DC converters to provide the power supply voltages to the AcroPack modules that are not present at the host interface. The 1.5 Volt supply is sourced from the 3.3 Volt host power. The 5 Volt and -12 Volt supply is sourced from 12 Volt host power.

  • Features & Benefits

    • Two AcroPack or mini-PCIe module slots support any combination of I/O functions
    • PCI Express compliant
    • Plug-and-play carrier configuration and interrupt support
    • Fused 1.5V, 3.3V, 5V, 12V, and -12V DC power is provided. A fuse is present on each supply line serving each AcroPack module.
    • Front panel 68-pin VHDC1 CHAMP 0.8 connectors for field I/O signals
    • Extended temperature range
    • DIP switch card identification
    • Standard 14-pin Xilinx JTAG programming header
    • Software development tools for VxWorks, Linux, and Windows environments
  • Tech Papers

    What is FPGA Zynq UltraScale+?
    APZU FPGA-based digital I/O modules provide programmable Xilinx® Zynq UltraScale+ MPSoC This paper is a brief overview of some of Acromag’s APZU FPGA Zynq® UltraScale+™ with MPSoC products, as well as the features of AcroPack Zinq UltraScale+, the carrier boards that host AcroPack mezzanine modules. We’ll highlight some of the development tools, the engineering design kit, and...
    What are FPGAs and FPGA Applications? | Webcast
    FPGAs and Their Use in the Embedded Space What are FPGAs and FPGA Applications in the Embedded Space? Topics in this webcast include: What FPGAs Are Best-suited Applications Coding Methods Processing Types This video is part one of a three-part series in collaboration with Vic Myers Associates discussing the use of FPGAs and their applications.  ...
    How to Use Vivado for FPGA Modifications | Webcast
    FPGA Design Modifications Using Vivado & Acromag Tools How to Use Vivado for FPGA Modifications. Topics in this webcast include: Vivado 2019.2 Acromag Example Design Compile Project Produce new MCS file This video is part two of a three-part series in collaboration with Vic Myers Associates discussing the use of FPGAs and their applications.  ...
    What is FPGA Zync UltraScale+? | Webcast
    These FPGA modules provide a programmable Xilinx Zynq® UltraScale+™ MPSoC What is FPGA Zync UltraScale+? Acromag’s APZU series modules provide a programmable Xilinx Zynq® UltraScale+™ multiprocessor system on a chip (MPSoC). This MPSoC combines a feature-rich ARM-based processing system and programmable logic in a single device. The AcroPack® APZU Mini PCIe FPGA Series is the...
    How do FPGA Modules Drive Real-Time Applications?
    FPGA Modules with an Integrated Processor Drive Real-Time Applications Engineers developing DSP and high speed logic applications are now well-aware that FPGA modules can help them create an integrated, sophisticated solution. The availability of commercial off-the-shelf (COTS) FPGA boards can make these solutions viable and do so in reduced development times. Today, with systems architected...
    Migrating from VME to VPX or PCIe: Top 6 Considerations | Webcast
    In this webcast several important topics are covered for migrating from VME to VPX or PCIe. This includes the advantages and disadvantages of VME architecture, six key considerations, and an overview of migration to PCIe or VPX (advantages, disadvantages, complexity, performance and cost).   More Resources: What is FPGA Zynq UltraScale+ with MPSoC? | Technology...
  • Specs & Data Sheets

  • Software

    APSW-API-LNX (Log in to download the file)
  • Accessories

    • Compare

      502x Cable Series

      • Communication Signal Cables
      • Wide assortment of ribbon cables
      $45$705
      Select options
    • Compare

      APSW-API: I/O Function Routines for VxWorks, Windows, Linux

      • Programming interface with function routines for AcroPack modules/carriers.
      • Customizable for other operating systems.
      $360$835
      Select options
    • Compare

      Termination Products

      • DIN rail-mount panels
      • 50 screw terminals on 50-pin connector termination panels
      • 50 screw terminals on SCSI-2 connector termination panels
      • 68 screw terminals on SCSI-3 connector termination panels
      $170$245
      Select options
  • Additional information

    Additional information

    Weight N/A
    Dimensions N/A
    Part Number

    APCe7022E-LF: holds 2 AcroPack boards, extended temperature range

    Product Series

    AcroPack Series