APCe7012: PCI Express Carrier Card for AcroPack® Modules
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Product short description:
- One AcroPack or mini-PCIe mezzanine module slot
- Low-profile PCIe carrier card
This board interfaces one AcroPack mezzanine module to a PCI Express bus on a PC-based computer system.
- Description
- Features & Benefits
- Tech Papers
- Specs & Data Sheets
- Software
- Accessories
- Additional information
APCe7012: PCI Express Carrier Card for AcroPack® Modules Description
This board interfaces one AcroPack mezzanine module to a PCI Express bus on a PC-based computer system.
Select I/O modules from Acromag’s offering or use most third-party mPCIe compliant modules.
The AcroPack® product line updates our popular Industry Pack I/O modules with a PCIe interface format. This tech-refresh design offers a compact size, low-cost I/O, the same functionality and memory map of the existing Industry Pack modules.
Performance Specifications
PCI Express Bus Compliance
This device meets or exceeds all written PCI Express specifications per revision 2.1. The host port consists of one PCIe lane, each of the mini-PCIe sites have one lane each.
I/O Interface
Connectors
P1 (PCIe Bus): PCIe V2.1.
J3 (Carrier Field I/O): 68-pin, CHAMP (TE Connectivity 5796055-1).
P2,(AcroPack Field I/O): 100-pin socket (Samtec SS5-50-3.00-L-D-K-RT).
J1, (Mini-PCIe): 52-pin socket (TE Connectivity 1759547-1).
P3 (JTAG): 14-pin header (Molex 87832-1420).
Gold plating in the connection area, M2.5 screws and spacers provide excellent connection integrity and stability for harsh environments.
Ease of Use
A standard 14-pin Xilinx JTAG programming header is provided for programming and debugging the FPGA on some AcroPack modules.
Physical
Physical Configuration: PCIe x1 low-profile
Length: 6.3 inches (160 mm).
Height: 2.711 inches (68.86 mm).
Includes standard and low-profile brackets.
Environmental
Operating temperature: -40 to 85°C.
Storage temperature: -55 to 125°C.
Relative humidity: 5 to 95% non-condensing.
Power
3.3 Volts (±10%): 0.55mA typical.
12 Volts (±5%): 25mA Typical.
The APCe7012E-LF has DC/DC converters to provide the power supply voltages to the AcroPack modules that are not present at the host interface. The 1.5 Volt supply is sourced from the 3.3 Volt host power. The 5 Volt and -12 Volt supply is sourced from 12 Volt host power.
- One AcroPack or mini-PCIe module slot
- PCI Express compliant
- Plug-and-play carrier configuration and interrupt support
- Fused 1.5V, 3.3V, 5V, 12V, and -12V DC power is provided. A fuse is present on each supply line serving each AcroPack module.
- Front panel 68-pin CHAMP 0.8mm connectors for field I/O signals
- Optional isolated power supplies. Support for AcroPacks requiring ±12 Volt isolated power
- Extended temperature range
- DIP switch card identification
- Standard 14-pin Xilinx JTAG programming header
- Software development tools for VxWorks®, Linux®, and Windows® environments
-
Termination Products
- DIN rail-mount panels
- 50 screw terminals on 50-pin connector termination panels
- 50 screw terminals on SCSI-2 connector termination panels
- 68 screw terminals on SCSI-3 connector termination panels
Select options
Additional information
| Weight | N/A |
|---|---|
| Dimensions | N/A |
| Part Number | APCe7012E-LF: holds 1 AcroPack board. |
| Product Series | AcroPack Series |
-
Description
APCe7012: PCI Express Carrier Card for AcroPack® Modules Description
This board interfaces one AcroPack mezzanine module to a PCI Express bus on a PC-based computer system.
Select I/O modules from Acromag’s offering or use most third-party mPCIe compliant modules.
The AcroPack® product line updates our popular Industry Pack I/O modules with a PCIe interface format. This tech-refresh design offers a compact size, low-cost I/O, the same functionality and memory map of the existing Industry Pack modules.
Performance Specifications
PCI Express Bus Compliance
This device meets or exceeds all written PCI Express specifications per revision 2.1. The host port consists of one PCIe lane, each of the mini-PCIe sites have one lane each.
I/O Interface
Connectors
P1 (PCIe Bus): PCIe V2.1.
J3 (Carrier Field I/O): 68-pin, CHAMP (TE Connectivity 5796055-1).
P2,(AcroPack Field I/O): 100-pin socket (Samtec SS5-50-3.00-L-D-K-RT).
J1, (Mini-PCIe): 52-pin socket (TE Connectivity 1759547-1).
P3 (JTAG): 14-pin header (Molex 87832-1420).
Gold plating in the connection area, M2.5 screws and spacers provide excellent connection integrity and stability for harsh environments.Ease of Use
A standard 14-pin Xilinx JTAG programming header is provided for programming and debugging the FPGA on some AcroPack modules.
Physical
Physical Configuration: PCIe x1 low-profile
Length: 6.3 inches (160 mm).
Height: 2.711 inches (68.86 mm).
Includes standard and low-profile brackets.Environmental
Operating temperature: -40 to 85°C.
Storage temperature: -55 to 125°C.
Relative humidity: 5 to 95% non-condensing.
Power
3.3 Volts (±10%): 0.55mA typical.
12 Volts (±5%): 25mA Typical.The APCe7012E-LF has DC/DC converters to provide the power supply voltages to the AcroPack modules that are not present at the host interface. The 1.5 Volt supply is sourced from the 3.3 Volt host power. The 5 Volt and -12 Volt supply is sourced from 12 Volt host power.
-
Features & Benefits
- One AcroPack or mini-PCIe module slot
- PCI Express compliant
- Plug-and-play carrier configuration and interrupt support
- Fused 1.5V, 3.3V, 5V, 12V, and -12V DC power is provided. A fuse is present on each supply line serving each AcroPack module.
- Front panel 68-pin CHAMP 0.8mm connectors for field I/O signals
- Optional isolated power supplies. Support for AcroPacks requiring ±12 Volt isolated power
- Extended temperature range
- DIP switch card identification
- Standard 14-pin Xilinx JTAG programming header
- Software development tools for VxWorks®, Linux®, and Windows® environments
-
Tech Papers
What is FPGA Zynq UltraScale+ with MPSoC? - 8401065 (Log in to view the file)APZU FPGA-based digital I/O modules provide programmable Xilinx® Zynq UltraScale+ MPSoC This paper is a brief overview of some of Acromag’s APZU FPGA Zynq® UltraScale+™ with MPSoC products, as well as the features of AcroPack Zinq UltraScale+, the carrier boards that host AcroPack mezzanine modules. We’ll highlight some of the development tools, the engineering design kit, and...What are FPGAs and FPGA Applications? | WebcastFPGAs and Their Use in the Embedded Space What are FPGAs and FPGA Applications in the Embedded Space? Topics in this webcast include: What FPGAs Are Best-suited Applications Coding Methods Processing Types This video is part one of a three-part series in collaboration with Vic Myers Associates discussing the use of FPGAs and their applications. ...How to Use Vivado for FPGA Modifications | WebcastFPGA Design Modifications Using Vivado & Acromag Tools How to Use Vivado for FPGA Modifications. Topics in this webcast include: Vivado 2019.2 Acromag Example Design Compile Project Produce new MCS file This video is part two of a three-part series in collaboration with Vic Myers Associates discussing the use of FPGAs and their applications. ...What is FPGA Zync UltraScale+? | WebcastThese FPGA modules provide a programmable Xilinx Zynq® UltraScale+™ MPSoC What is FPGA Zync UltraScale+? Acromag’s APZU series modules provide a programmable Xilinx Zynq® UltraScale+™ multiprocessor system on a chip (MPSoC). This MPSoC combines a feature-rich ARM-based processing system and programmable logic in a single device. The AcroPack® APZU Mini PCIe FPGA Series is the...How do FPGA Modules Drive Real-Time Applications? - 8400530FPGA Modules with an Integrated Processor Drive Real-Time Applications Engineers developing DSP and high speed logic applications are now well-aware that FPGA modules can help them create an integrated, sophisticated solution. The availability of commercial off-the-shelf (COTS) FPGA boards can make these solutions viable and do so in reduced development times. Today, with systems architected...Migrating from VME to VPX or PCIe: Top 6 Considerations | WebcastIn this webcast several important topics are covered for migrating from VME to VPX or PCIe. This includes the advantages and disadvantages of VME architecture, six key considerations, and an overview of migration to PCIe or VPX (advantages, disadvantages, complexity, performance and cost). More Resources: What is FPGA Zynq UltraScale+ with MPSoC? | Technology... -
Specs & Data Sheets
-
Software
-
Accessories
-
Termination Products
- DIN rail-mount panels
- 50 screw terminals on 50-pin connector termination panels
- 50 screw terminals on SCSI-2 connector termination panels
- 68 screw terminals on SCSI-3 connector termination panels
Select options
-
Additional information
Additional information
Weight N/A Dimensions N/A Part Number APCe7012E-LF: holds 1 AcroPack board.
Product Series AcroPack Series
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