What does the Engineering Design Kit contain for the PMC FPGA Modules?
The Engineering Design kit contains eight directories, one for each model type. For example the PMC-DX503 directory contains the following files:
DX503_732a.pdf DX503 User's Manual
4501982a.pdf Schematic and Part Location Drawing
DX503.pdf Part list for DX503
XC2V503.vhd VHDL Main Source File for Example Design
SRAM.vhd VHDL SRAM Component Source File for Example Design
DIG_IO_8.vhd VHDL Digital I/O Interrupt Source File for Example
Constraints.Ucf Xilinx VirtexII Constraints File
XC2V503.mcs Hex Configuration File Used to Program VirtexII FPGA
README_DX503.txt Getting Started Document
The 4501982a.pdf file contains the part location and schematic for the DX502/3. The first page contains the part location drawing when viewed from the top of the board. Pages 2 to 12 contain the schematics.
The XC2V503.vhd, SRAM.vhd, and DIG_IO_8.vhd are the source files for the example design provided by Acromag Inc. These files require the use of the Xilinx ISE software.
The XC2V503.vhd provide an example design implementing the PLX PCI9056 local bus interface to the FPGA.
DIG_IO_8.vhd provides an example design to control the digital I/O and change of state interrupts on the first eight data lines .
SRAM.vhd provide an example interface to the 256Kx36 SRAM.
The details of the memory map and register functions implemented in this example design are described in the DX503 user's manual.
The Constraints.Ucf file contains information about connected pin device assignments for the DX503 Xilinx project.
The XC2V503.mcs file is a hexadecimal configuration file which is used to configure the Xilinx XC2V500-fg456 over the PCI bus. This file can also be loaded into flash for Xilinx automatic configuration upon power-up. This hex file is generated by the Xilinx iMPACT software and is an ASCII file in the Intel Hex format.