Acromag’s cost-effective XMC-SLX modules feature a user-configurable Xilinx® Spartan®-6 FPGA enhanced with high-speed memory and a high-throughput PCIe interface. Field I/O interfaces to the FPGA via the rear J4/P4 connector and/or with optional front mezzanine AXM plug-in I/O modules. The result is a powerful and flexible I/O processor module that is capable of executing custom instruction sets and algorithms. The logic-optimized FPGA is well-suited for a broad range of applications. Typical uses include hardware simulation, communications, in-circuit diagnostics, military servers, signal intelligence, and image processing. Large, high-speed memory banks enable efficient data handling. The dual-port SRAM facilitates high-speed DMA transfers to the bus or CPU. A high-bandwidth PCIe interface ensures fast data throughput. 64 I/O lines are accessible through the rear (J4) connector. Additional I/O processing is supported on a separate mezzanine card that plugs into the FPGA base board. A variety of these external AXM I/O cards are available to interface your analog and digital I/O signals. Take advantage of the conduction-cooled design for use in hostile environments. Conduction efficiently dissipates heat if there is inadequate cooling air flow. Optional extended temperature models operate reliably from -40 to 85°C. Acromag’s Engineering Design Kit provides software utilities and example VHDL code to simplify your program development and get you running quickly. A JTAG interface enables on-board VHDL debugging.
FPGA DeviceXilinx Spartan-6 FPGA: Model XC6SLX150-3FG676 FPGA with 147,433 logic cells and 180 DSP48A1 slices. FPGA configuration: Download via PCIe bus or flash memory. Example FPGA program: VHDL provided for bus interface, front & rear I/O control, SRAM read/write interface logic, and SDRAM memory interface controller. See EDK kit.
I/O ProcessingAcromag AXM I/O modules: AXM modules plug into the XMC module’s front mezzanine for additional I/O lines. Analog and digital I/O AXM modules are sold separately. Rear I/O: 64 I/O (32 LVDS) lines supported with a direct connection between the FPGA and the rear I/O connector (J4).
Engineering Design KitProvides user with basic information required to develop a custom FPGA program. Kit must be ordered with the first purchase of a XMC-SLX module (see www.acromag.com for more information).
XMC ComplianceConforms to PCI Express 1.1a electrical and protocol standards. 2.5Gbps data rate per lane per direction. Complies with ANSI/VITA 42.0 specification for XMC module mechanicals and connectors Complies with ANSI/VITA 42.3 specification for XMC modules with PCI Express interface. Electrical/Mechanical Interface: Single-Width Module.
EnvironmentalOperating temperature: -0 to 70°C or -40 to 85°C (E versions). Storage temperature: -55 to 125°C. Relative humidity: 5 to 95% non-condensing. Power 3.3V (±5%): 700mA typical, 840mA maximum. 12V (±5%): 640mA typical, 804mA maximum. MTBF: Contact the factory.
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