Several models with a variety of configurations provide up to ten counter/timer channels for counting events, generating waveform control signals, measuring pulse-widths or periodic rates, and monitoring operations. Support for internal or external triggering simplifies the synchronization of operations to specific events. Counter functions can use internally generated clocks or an externally supplied clock.
Counter/TimersCounter/timer configuration: PMC482: Ten 16-bit TTL counters PMC483: Four 16-bit TTL counters, four 32-bit RS422 counters PMC484: Six 32-bit RS422 counters Other I/O mixes can be made available as specials. Clock frequency: 20MHz. Field I/O: Front panel SCSI-3 connector. Speed (with 20MHz internal clock): Maximum output pulse/square wave freq.: 200nS. Minimum event pulse width: 100nS. Minimum pulse width measurement: 100nS. Minimum period measurement: 200nS. Mode accuracy (with external clocking): Waveform generation: Period is ±62nS. Watchdog: Timeout occurs within ±1 clock cycle. Pulse/period measurement: ±1 clock cycle. Internal clocks: Programmable 1.25, 2.5, 5, 10 or 20MHz via the counter control register. External clocks: Supported on a per-counter basis via clock line. Maximum frequency 8MHz. Interrupts: Supported for watchdog timer time-out, event count complete, pulse width or periodic rate measurement complete, pulse wave complete (one-shot mode), successive waveform generation (continuous). Triggering/gate: Programmable via register write or external trigger. Minimum pulse width 100nS. Line may be used for gating of counter. Counter trigger: Interface for triggering counter functions. Input level is TTL or RS422 differential digital. Counter input: Interface for events and pulse/period measurements. Also triggers load of watchdog timer register. Level is TTL or RS422 differential digital. TTL compatibility: VIH = 2.0V and VIL = 0.8V. inputs are buffered and include 4.7K pull-ups to +5V. Counter output: Level is TTL or RS422 differential digital.
PMC ComplianceConforms to PCI Local Bus Specification, Revision 2.2 and CMC/PMC Specification, P1386.1. Electrical/Mechanical Interface: Single-Width Module. 32-bit PCI Target: Implemented by Altera FPGA. 4K Memory Space Required: One Base Address Register. Signaling: 5V Compliant, 3.3V Tolerant. Interrupts (INTA#): Interrupt A is used to request an interrupt. Register Access Times: 8 PCI clock cycles, typical.
EnvironmentalOperating temp.: 0 to 70°C or -40 to 85°C (E versions) Storage temperature: -55 to 105°C. Relative humidity: 5 to 95% non-condensing. Power: Consult factory. MTBF: Hours at 25°C, MIL-HDBK-217F, notice 2. PMC482 1,744,259; PMC483 1,727,707; PMC484 1,708,729
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