The XMX-7K User Manual (Rev C) shows the Configuration Registers in Table 7, with the BAR2 register listed as "Reg. Num." 6:7 (i.e. two consective 32-bit locations). At 4 bytes per register, I would calculate a byte-offset for this 64-bit value to be 4 x 6 = 24, or hex 0x018.
But, referring to the file "PCIe7KA_CoreRegisters.h" from PCISW_API_WIN (dated 3/30/2015), the offset of PCIe7KA_BAR2_ADDR is 0x014. It also only allocates a single 32-bit location for it, since the next offset (for BAR4) is shown to be 0x018.
I'd like to read the value at BAR2, but given the above [I think] inconsistency, I thought I should ask for clarification.