How does FPGA Drive Real-Time Applications?
FPGA Modules with Integrated Processors Drive Real-Time Applications
Engineers developing DSP and high-speed logic applications know that FPGA modules can help them create an integrated, sophisticated solution. The availability of commercial off-the-shelf (COTS) FPGA boards can make these solutions viable and do so in reduced development times. Today, systems are architected to perform extremely time-critical tasks on a COTS FPGA module. Hence, the host CPU often manages the flow of processed data to and from the FPGA module across a PCI-X bus, PCIe, Serial Rapid I/O, or other data interface. Some processing or data storage activities are shared between the FPGA module and host CPU; making this data transfer necessary.
Acromag FPGA Family Pictured Above
More Processing & Management of Data in One Place
Do these activities have to be shared? Not necessarily. When applications have high-speed requirements and more of the slower data management/calculation tasks can be lifted from the host CPU; a COTS FPGA module with an integrated processor might be the solution.
Parallel Processing Devices
FPGAs, by design, are massively parallel processing devices. Processes such as image processing, with large amounts of data being manipulated and filtered simultaneously, can take advantage of this parallel capability. The language developed to process this information (VHDL), is well-suited to create the processes necessary. On the other hand, CPUs are designed to process complex, but sequential, configurable data manipulations. Mixed-resolution matrix processes that rotate an image are one example best handled by a CPU. Coding for the CPU process is usually written in one of the popular high-level languages (i.e. C++). When both the FPGA and the processor appeared to have a natural fit within the application, the norm was to marry the two devices in an attempt to optimize the application’s data processing. The problem in this case was the constant, time-consuming task of passing sizable chunks of data between the FPGA and processor. If the two components are integrated into one design, then this problem will be minimized or eliminated.
So how does a design engineer gain access to the computational/data management conveniences afforded by a processor within an FPGA? Download the PDF below to learn more about the two methods that have evolved in detail.