Frequently Asked Questions

Q1: What does Acromag offer for COTS applications?

Q2: What do I need to implement the IP-1K100 FPGA Industry Pack Module?

Q3: What does the Engineering Design Kit contain for the PMC FPGA Modules?

Q4: I am beginning a design that will need to be implemented and supported over the next seven years. What is Acromag's policy on the end-of-life of their products?

Q5: What are Acromag’s quality control procedures?

Q6: Right-Sizing FPGA Mezzanines Expands Application Space written by Joseph Primeau, Acromag Director of Marketing & Sales, as seen in RTC Magazine.

A1:  What does Acromag offer for COTS applications?
Acromag I/O boards can be ordered with extended temperature ranges and conformal coating. We also have an extensive program to manage component obsolescence. Flash video (15 minutes)

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A2: What do I need to implement the IP-1K110 FPGA Industry Pack Module? 
To program the IP-1K110 module, you will need Acromag’s Engineering Design Kit (IP-1K110-EDK). And for easier integration with your operating system, we also recommend our OS software support packages for VxWorks, QNX, and Windows.

The Engineering Design Kit includes schematics for the boards, example VHDL code, and example software for downloading the Hex code (converted from VHDL code) to the FPGA on the IP-1K110 module. It does not contain the VHDL design software. The most commonly used design tool used for this purpose is the MAX+PLUS II BASELINE software, which is downloadable at no cost from Altera. This free software includes a VHDL compiler, timing analysis tools, and more. The LeonardoSpectrum™-Altera® synthesis tool is also available for download. Another option is to purchase the full MAX+PLUS II software package. Contact Altera for guidance on which package would be appropriate for your use.

The IP-1K110 module uses Altera's model EP1K100 FPGA which is part of their ACEX family of FPGAs. More information on this component can be found at http://www.altera.com/literature/ds/acex.pdf

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A3: What does the Engineering Design Kit contain for the PMC FPGA Modules?
The Engineering Design kit contains eight directories, one for each model type. For example the PMC-DX503 directory contains the following files:

• DX503_732a.pdf DX503 User's Manual
• 4501982a.pdf Schematic and Part Location Drawing
• DX503.pdf Part list for DX503
• XC2V503.vhd VHDL Main Source File for Example Design
• SRAM.vhd VHDL SRAM Component Source File for Example Design
• DIG_IO_8.vhd VHDL Digital I/O Interrupt Source File for Example

Design

• Constraints.Ucf Xilinx VirtexII Constraints File
• XC2V503.mcs Hex Configuration File Used to Program VirtexII FPGA
• README_DX503.txt Getting Started Document

Overview

The 4501982a.pdf file contains the part location and schematic for the DX502/3. The first page contains the part location drawing when viewed from the top of the board. Pages 2 to 12 contain the schematics.

The XC2V503.vhd, SRAM.vhd, and DIG_IO_8.vhd are the source files for the example design provided by Acromag Inc. These files require the use of the Xilinx ISE software.

The XC2V503.vhd provide an example design implementing the PLX PCI9056 local bus interface to the FPGA.

DIG_IO_8.vhd provides an example design to control the digital I/O and change of state interrupts on the first eight data lines .

SRAM.vhd provide an example interface to the 256Kx36 SRAM.

The details of the memory map and register functions implemented in this example design are described in the DX503 user's manual.

The Constraints.Ucf file contains information about connected pin device assignments for the DX503 Xilinx project.

The XC2V503.mcs file is a hexadecimal configuration file which is used to configure the Xilinx XC2V500-fg456 over the PCI bus. This file can also be loaded into flash for Xilinx automatic configuration upon power-up. This hex file is generated by the Xilinx iMPACT software and is an ASCII file in the Intel Hex format.

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A4: I am beginning a design that will need to be implemented and supported over the next seven years. What is Acromag's policy on the end-of-life of their products.

Great lengths are taken to accommodate the needs of our OEM and military customers that demand stable designs with long product life cycles. Our goal is to design for an expected life cycle of ten years or more. Acromag design engineers achieve this 10-year goal by starting with careful selection of parts and the availability of second-source suppliers. When necessary, Acromag has made "lifetime" buys for parts that have been discontinued to ensure that we can still supply boards for our existing customer base years into the future. And in other cases, Acromag has redesigned boards to maintain form, fit, and functional equivalency.

Acromag works hard to maintain close relationships and consult with our customers to provide long range notification when a products nearing retirement. Customers are typically contacted twelve to eighteen months prior to discontinuing a model. Although Acromag makes every effort to accurately estimate a product's end of life, it is not always possible. Constant changes in part availability are an ongoing challenge. Acromag tries to maintain generous part inventories to compensate for cyclical short-term part shortages. In addition, Acromag keeps very close relations with their major suppliers to help prevent forced product terminations due to unforeseen part shortages or discontinued components.

In addition, Acromag maintains the documentation to repair products for a minimum of 7 years from the date of EOL. Acromag also attempts to maintain an inventory of parts to repair boards for this period. Unfortunately, this is not always possible due to the degradation of some part over time.

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A5: What are Acromag’s quality control procedures?
Acromag is committed to provide products of quality that meet the initial and continuing needs and expectations of our customers. Please view this brief Flash video presentation for more information.

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