New PMC modules combine the power of a configurable Virtex-4 FPGA with interchangeable digital I/O front-ends.

Acromag's new PMC I/O modules provide a Virtex-4 FPGA for fast processing of custom logic routines and a front mezzanine for plug-in digital I/O cards to interface a variety of signal types

Acromag's new PMC-LX and PMC-SX modules support a variety of AXM plug-in I/O extension modules to interface different signal types to a user-configurable Xilinx® Virtex-4® FPGA. The powerful Virtex-4 FPGA can process user-defined algorithms and custom logic routines on RS-485 differential, CMOS, or LVDS digital I/O signals depending on the AXM I/O module inserted. The PMC base card has 32 LVDS I/O channels available via P4 for rear connection I/O and conduction cooled applications. PMC-LX models are optimized for high-performance logic with a choice of LX40 or LX60 Virtex-4 FPGAs while the PMC-SX model uses the SX35 FPGA designed for high-speed digital signal processing. Typical uses include sonar/radar, military servers, hardware simulators, communication processing, and automated test equipment. FPGA modules start at $3200 with varying performance levels plus $350 for the optional AXM digital I/O extension modules .

Powerful and versatile, these PMC modules offer a choice of Virtex-4 FPGAs to match your logic and signal processing requirements. PMC-LX models can be ordered with an LX40 or LX60 FPGA featuring 40K or 60K logic cells, respectively. They provide a high logic-to-feature ratio and a high I/O-to-feature ratio. The PMC-SX features an SX35 FPGA with 192 DSP slices and 35K logic cells. The SX35 can help you build custom pre/post/co-processing hardware or high-performance filters. You can create more than 40 different functions (MACs, multipliers, adders, and muxes).All Virtex-4 FPGAs feature versatile logic resources, large on-chip memories, and a high-speed interface.

I/O processing is handled on a separate mezzanine card that plugs into the FPGA base board. A variety of these AXM extension I/O modules offer an interface for your analog and digital I/O signals. Additionally, 64 I/O lines are supported via the rear (P4) connector. The PCI bus interface is handled by a PLX® PCI 9056 device which provides 32-bit 66MHz bus mastering with dual-channel DMA support.  More

Acromag Update
Acromag is very excited to announce Rowland Demko as our new Western Regional Sales Manager.  As Regional Sales Manager Rowland is charged with managing, supporting and growing the Western US and Western Canadian Embedded Bus Board territories. His contact information is listed below.

Mr. Rowland Demko
Western Regional Sales Manager
Direct Phone: 248-295-0825
Cell Phone: 248-787-3894
Email: rdemko@acromag.com

Representative Territory Expands
Acromag is pleased to announce that the James R. Johnson & Associates sales territory  in Minnesota has expanded to include all of Wisconsin and Northern Illinois. James R. Johnson & Associates can help you with all your Embedded Bus Board Solutions. You can contact them at 763-478-2744.

Question:  I was looking over the new design for your PMC-LX40 board and noted that you have both SDRAM and SRAM designed on the board.  I like the fact that you have plenty of memory available, but why have both types of memory?

Answer:  As you pointed out, the PMC-LX40, PMC-LX60 and PMC-SX35 contain both SDRAM and SRAM in the design.  Each memory type is included with a particular purpose in mind. 

Collection of pre-processed data
The SDRAM offers 64Mb x 16 or 32Mb x 32 blocks of memory specifically tailored for very high-speed data collection.  Operating from a 200 MHz clock and configured as Double-Data-Rate (DDR) SDRAM, these devices allow reading or writing to memory on both the rising and falling edge of the clock. This allows data to be stored at a clock rate of up to 400 MHz.  As such, it is particularly well-suited for collecting and storing incoming data over high-speed networks such as our LVDS I/O.  Once data has been acquired and stored, it then can be made available to the FPGA for processing.

Post-process storage and DMA transfer
Once data has been collected and processed through the FPGA (decoded, processed through algorithm, data reduced, etc.), it typically needs to be stored for transfer to the host via DMA transfer.  This is where the dual-ported 256Kb x 36 DRAM comes into play.  One of the dual ports of the DRAM is connected to the FPGA for data storage, while the other is connected to the local bus, which is in turn connected to the PCI bus interface controller (PLX).  This connection to the PCI bus allows direct access to the DRAM memory from the PCI bus either from the host processor or for reading or writing to via DMA transfer.

See Acromag at the Real-Time & Embedded Computing Conference which is designed for those developing computer systems and time-critical applications serving multiple industries; data communication and telephony, military and aerospace, industrial control, instrumentation, consumer electronics, image processing, process control, medical instrumentation, vehicular control and maintenance, embedded appliances and more.

Next Show:

October 19, 2006 - Tysons Corner, VA

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Acromag, Inc.
30765 S. Wixom Rd.
P.O. Box 437
Wixom, Michigan 48393-7037
Phone: 248-295-0310
Fax: 248-624-9234
e-mail: solutions@acromag.com
www.acromag.com

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