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Featured Product
Re-configurable PMC FPGA I/O modules now available with a choice of front or rear I/O connection.

Acromag's PMC-DX series of customizable FPGA I/O modules now includes models with a rear connection field I/O interface. To provide more convenient I/O access, the modules can be ordered with a front panel SCSI-2 connector or a J4 connector enabling a cable-free link to the host PMC carrier or CPU board. All models feature a Xilinx® Virtex-II® FPGA with either 500K or 2M system gates. Several I/O configurations are available to process TTL, differential RS422, or LVDS digital I/O signals. Module prices start at $1400 with extended temperature models (-40 to 85°C operation) available for an additional $200.

These affordable FPGA I/O modules bring the ability to configure custom I/O boards using application-specific instruction sets within the reach of more system developers. The PMC-DX modules feature a fast PCI interface with 32-bit 66MHz bus mastering and support dual DMA channel data transfer to the CPU. With up to 1Mb of on-chip memory and 9Mb of on-board SRAM, Acromag's  modules give users the flexibility to embed their code into the FPGA or to modify signal processing operations on the fly by loading new code into flash memory as requirements change.
more
Application Spotlight
Trailmobile Canada , a leading manufacturer of dry van trailers is well known for their high quality, durable van trailers. The Canadian division is a subsidiary of the Trailmobile Company headquartered in Northbrook, IL.

The legacy of Trailmobile extends back to 1835. It is known worldwide for its innovation and evolution of durable semi-trailer manufacturing. Trailmobile has been in the forefront of design changes, testing methods and standards: as well as technological advances for van vehicles.

As a part of their on-going enhanced test facility, Trailmobile Canada selected both the Acromag APC464 Digital I/O and APC482 Counter Timer PCI boards for use within their integrated test stand running under a Windows environment.

To request product literature or our latest catalog, use our on-line form.

Real-Time Show

See Acromag at the Real-Time & Embedded Computing Conference which is designed for those developing computer systems and time-critical applications serving multiple industries; data communication and telephony, military and aerospace, industrial control, instrumentation, consumer electronics, image processing, process control, medical instrumentation, vehicular control and maintenance, embedded appliances and more.

Next Show:
January 27, 2005 - San Jose, California

February 15, 2005 - Tucson, Arizona

March 1, 2005 - Denver, Colorado

March 17, 2005 - Melbourne, Florida

Ask the I/O Experts

Question: I have an application that requires the collection of data from several I/O ports and the temporary storage of this data in SRAM. Simultaneously, I need to move this data to memory with a DMA transfer.  Since Acromag's SRAM has only a single port, I am concerned that either data will be lost or time delays will be created in my DMA transfer when trying to read and write data to the SRAM at the same time. Is there a way to address this problem?

Answer: There is a simple solution to this issue. By configuring the memory in the FPGA as FIFO memory (you may have to create multiple FIFO blocks depending on your requirements), you can create a temporary buffer for data you are collecting from the I/O ports. Data coming from the field I/O would be passed through this FIFO before being sent to SRAM. A gate function would then be created that would allow field I/O data to be passed out of the FIFO memory into SRAM when no DMA transfers are taking place. Once the DMA transfer is complete, the data stored temporarily in FIFO could then be passed in the SRAM for the next DMA transfer. This allows fast DMA transfers of data from SRAM without concern about delays while waiting for field I/O to be written to the SRAM.

The control line that you would use to control this FIFO gate follows.
DACK0_n: in STD_LOGIC; -- PCI9056 asserts to indicate DMA transfer in process on DMA0
or
DACK1_n: in STD_LOGIC; -- PCI9056 asserts to indicate DMA transfer in process on DMA1

More Information

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Acromag, Inc.
30765 S. Wixom Rd.
P.O. Box 437
Wixom, Michigan 48393-7037
Phone: 248-624-1541
Fax: 248-624-9234
e-mail: solutions@acromag.com
www.acromag.com

"The reasonable man adapts himself to the world; the unreasonable one persists in trying to adapt the world to himself. Therefore, all progress depends on the unreasonable man."

George Bernard Shaw


   
 
 

   
 
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